Dr. Prasenjit Dey

PhD in neural networks and machine learning

Concepts of Convolutional neural networks and its basic implementation in Python language
Concepts of Convolutional neural networks and its basic implementation in Python language
Applications of ML in agriculture
Applications of ML in agriculture
Implementation of 8-bit SIPO shift-left Register using Xilinx
Implementation of 8-bit SIPO shift-left Register using Xilinx
Implementation of 8-bit SISO shift-right register using Xilinx
Implementation of 8-bit SISO shift-right register using Xilinx
Implementation of D Flip Flop in VHDL using Xilinx
Implementation of D Flip Flop in VHDL using Xilinx
Implementation of JK Flip Flop in VHDL using Xilinx
Implementation of JK Flip Flop in VHDL using Xilinx
Implementation of SR Flip Flop in VHDL using Xilinx
Implementation of SR Flip Flop in VHDL using Xilinx
Implementation of Full Adder by using Half Adders in VHDL using Xilinx
Implementation of Full Adder by using Half Adders in VHDL using Xilinx
Class 9: While, For, Until and Select loops in Shell script
Class 9: While, For, Until and Select loops in Shell script
Class 8: If...Else and Switch cases in Shell script
Class 8: If...Else and Switch cases in Shell script
Class 7: All the basic Operations in Bash Shell
Class 7: All the basic Operations in Bash Shell
Class 6: Logical and String operations in Bourne Shell
Class 6: Logical and String operations in Bourne Shell
Class 5: Arithmetic and Relational operations in Bourne Shell
Class 5: Arithmetic and Relational operations in Bourne Shell
Class 4: Array Manipulation in shell script
Class 4: Array Manipulation in shell script
Class 3: Script for Getting PID, File name and argument list
Class 3: Script for Getting PID, File name and argument list
Class 2: Hello Username
Class 2: Hello Username
Shell Script Tutorial
Shell Script Tutorial
Addressing Mode
Addressing Mode
Binary Division Restoration and Non Restoration
Binary Division Restoration and Non Restoration
Page Replacement and Thrashing
Page Replacement and Thrashing
Implementation of 8bit multiplication by using VHDL in Xilinx
Implementation of 8bit multiplication by using VHDL in Xilinx
Implementation of 8bit addition by using VHDL in Xilinx
Implementation of 8bit addition by using VHDL in Xilinx
Implementation of Half Adder and Full Adder using VHDL in Xilinx
Implementation of Half Adder and Full Adder using VHDL in Xilinx
Implementation of AND gate using VHDL in Xilinx
Implementation of AND gate using VHDL in Xilinx
Instruction set
Instruction set
Cache Memory
Cache Memory
Different types of memory and hardware designs of RAM and ROM
Different types of memory and hardware designs of RAM and ROM
Carry Look Ahead Adder
Carry Look Ahead Adder
Register Transfer and Micro-operations Part 2
Register Transfer and Micro-operations Part 2
Register Transfer and Micro-operations Part 1
Register Transfer and Micro-operations Part 1