Dr. M. C. Hanumantha Raju

This channel provides information on engineering courses such as Basic Electronics, Digital system Design, VLSI/ASIC Design

1BBEE105/205: BJT Characteristics and Parameters
1BBEE105/205: BJT Characteristics and Parameters
1BBEE105/205: LTSPICE Demo Cont
1BBEE105/205: LTSPICE Demo Cont
1BBEE105/205: LTSPICE Demo
1BBEE105/205: LTSPICE Demo
1BBEE105/205: Introduction to Bipolar Junction Transistor (BJT)
1BBEE105/205: Introduction to Bipolar Junction Transistor (BJT)
1BBEE105/205: Zener Diode Applications
1BBEE105/205: Zener Diode Applications
1BBEE105/205: Zener Diodes
1BBEE105/205: Zener Diodes
1BBEE105/205: Bridge Rectifier and Filters
1BBEE105/205: Bridge Rectifier and Filters
1BBEE105/205: Rectifier Circuits
1BBEE105/205: Rectifier Circuits
1BBEE105/205: Diodes and Applications
1BBEE105/205: Diodes and Applications
2.5.1 Static CMOS Inverter DC Characteristics
2.5.1 Static CMOS Inverter DC Characteristics
IV Characteristics of MOSFETs
IV Characteristics of MOSFETs
Exercise Problems of Chapter 1
Exercise Problems of Chapter 1
2.2 Long Channel I-V Characteristics - NMOS Current Equations
2.2 Long Channel I-V Characteristics - NMOS Current Equations
2.1 MOS Transistor Working
2.1 MOS Transistor Working
Relationship between VGS, VDS, and VGD
Relationship between VGS, VDS, and VGD
2.1 MOS Structure
2.1 MOS Structure
Pass Transistors Transmission Gates, Tristates
Pass Transistors Transmission Gates, Tristates
VLSI Design Course
VLSI Design Course
1.4 CMOS Logic
1.4 CMOS Logic
1-3 MOS Transistors
1-3 MOS Transistors
1 1 A Brief History
1 1 A Brief History
Scheme and CIE SEE Pattern
Scheme and CIE SEE Pattern
Syllabus
Syllabus
Module 4: DSD Using Verilog - Verilog Code Simulation using ModelSim
Module 4: DSD Using Verilog - Verilog Code Simulation using ModelSim
DSD using Verilog: Module 4 - Introduction to Verilog
DSD using Verilog: Module 4 - Introduction to Verilog
DSD using Verilog: Module 3 - Counter Design
DSD using Verilog: Module 3 - Counter Design
DSD using Verilog: Module 3 - Counters
DSD using Verilog: Module 3 - Counters
DSD using Verilog: Module 3 - Shift Registers
DSD using Verilog: Module 3 - Shift Registers
DSD using Verilog: Module 3 - Master Slave SR Flip Flop
DSD using Verilog: Module 3 - Master Slave SR Flip Flop
DSD using Verilog: Module 3 - Flip-Flops
DSD using Verilog: Module 3 - Flip-Flops