Linkedin - / jeetendra-kumar-dubey%f0%9f%87%ae%f0%9f%87...
Email id - [email protected]
VDTT BRANCH IITD- • VDTT Branch is Sponsored by MNCs Qualcomm...
RFDT(Microelectronics, signal processing, Microwave) @IITD - • IIT DELHI MTECH CARE (RFDT) AVG CTC 22 L...
BITS PILANI:- / foqhnpoicf
MANIT BHOPAL :- • MTECH Admission through GATE @ MANIT (VLSI...
Texas interview experience :- https://studio.youtube.com/video/y2Uc...
intel interview experience:- • intel interview experience @ IIT DELHI | i...
Qualquam interview experience :- • Interview experience of Qualcomm VLSI Dig...
samsung interview experience:- • Interview Experience of SAMSUNG SEMICONDUC...
1. written test
a) Briefly Revise GATE syllabus of Digital, Analog, EDC & Circuit Theory
b) Solve C, C++ MCQ’s from geeksforgeeks:-
i) https://www.geeksforgeeks.org/c-multi...
ii) for theory, you can watch NESO Acedemy :-
/ watch v=rLf3jnHxSmU&list=PLBlnK6fEyqRggZZgYpPMUxdY1CYkZtARR
c) Aptitude questions
i) Notes which you prepared for GATE
ii) Indiabix website:- https://www.indiabix.com/aptitude/que...
d) Computer Architecture concepts
i) using udacity course:- https://www.udacity.com/course/high-p...
or
Madeeasy notes if you prepared for ESE
e) FIFO depth calculation-
https://drive.google.com/file/d/1AKIg... 8
2.VLSI Digital Profile Interview Preparation:
a) Make notes from Jan M. Rabey(UC Berkeley) Digital IC lectures. Then, do Read chapters-5,6,7,8,10,12 of “Digital Integrated Circuits: A design perspective” book by Rabaey or you can also go through Chapters-1 to 5 & 9 to 12 of “CMOS VLSI Design” book by Westey Harris for brushing up CMOS VLSI Concept
i) By Rabaey
• EE141 - 1/20/2012
ii) By Indian professor
• Introduction - Digital IC Design
iii) Digital Integrated Circuits by Jan M. Rabaey:- https://amzn.to/3pbxyi4
iv) CMOS VLSI Design” book by Westey Harris- https://amzn.to/3pON57g
b) Nptel lectures of Prof. Indranil Sen Gupta(IITKGP)will be enough for Verilog.
i) • Плейлист
ii)practice on Xilinx ISE Tool https://www.xilinx.com/support/downlo...
c) Watch nptel lecture oon Synchronization & Metastability
:- https://nptel.ac.in/courses/117/108/1...
d) STA is one the most asked topic in VLSI interviews.
i) Video :- • STA
ii) VLSI Expert blog :- http://www.vlsi-expert.com/2011/03/st...
e) Practice Layout design using Cadence tool. Also, learn how to draw stick diagrams
• Cadence tutorial - CMOS Inverter Layout
f) Puzzles -https://www.geeksforgeeks.org/puzzles/
g) FIFO- https://hardwaregeeksblog.files.wordp...
h) Frequency Divider circuit design:- • Clock Frequency Divider/Multipliers (Step ...
i) Basic Digital Design, FPGA, Pipelining, CDC, Synchronization & Metastability, Basic memory Design (SRAM & DRAM), Testing & Validation:- • Testing of VLSI Circuits
k)Physical Design
i) Adi teman Digital VLSI Design Lecture series:- • Digital VLSI Design Adi Teman
ii) Physical Design blog:- https://www.physicaldesign4u.com/
3. Analog Profile Interview Preparation :
a) Develop intuition on RC,RL,LC,RLC circuits. Use LTspice tool for simulation and understanding
i) https://rlcanalog.blogspot.com/p/most...
ii) youtube video:- • ES Lecture 13.a. Analysis of first order R...
• RC circuits with pulse input (Part 1) || P...
b) Go through Analog IC design nptel lectures of Prof. Shanthi Pavan(IITM) & Prof. Nagendra Krishnapura(IITM) :- https://nptel.ac.in/courses/117/106/1...
c) You should have a complete understanding of the first 7 chapters of the Design of Analog CMOS Integrated circuits book by Behzad Razavi & try to solve its examples and back chapter questions :- https://amzn.to/3pUillu
d) Try to have hands-on experience with tools like Cadence Virtuoso(for schematic design). You should have 2–3 good analog projects in resume like PLL design, Op-amp design, LDO, DSM, LNA, etc. PLL:- • Mod-11 Lec-31 Phase locked loop basics
e) Important Topics to cover: Small Signal Analysis, Current Mirrors, Op-amp Design Analysis, Switch Capacitor Circuits, Feedback, Noise, RC circuits
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