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Скачать или смотреть DESIGN OF A PROGRAMMABLE TIMER MODULE USING MICROBLAZE PROCESSOR ON FPGA

  • fatih küçük
  • 2024-05-26
  • 424
DESIGN OF A PROGRAMMABLE TIMER MODULE USING MICROBLAZE PROCESSOR ON FPGA
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In order to control servo motors using an FPGA, a microprocessor which is MicroBlaze is selected and a programmable timer module is designed using Verilog HDL. Our system will drive the servo motor using the linear speed control algorithm. One of the main challenges was that the timer module needed to work in any frequency range so that our programmable timer could provide a wide range of frequency values as an output. The algorithm needs three inputs. The needed inputs are the start frequency, destination frequency, and total pulse count to be reached. This algorithm creates a previously specified number of intervals (quantization number M) between the start and destination frequency for frequency values. Each interval reflects a frequency value and a pulse count value which enables the intervals to take the same amount of time. To be able to give the according frequency division ratios and pulse counts for each frequency level should be generated by the processor and sent to the programmable timer. With the upcoming values, the timer module creates the clock-out signal properly.
We first designed our linear speed control algorithm to achieve linear increase and decrease in speed of servo motors and implemented our algorithm using MATLAB. After confirming the correctness of the algorithm, we designed our digital system to realize it. We designed 2 ASMs: the first one uses previously calculated values via BRAM and the second one uses MicroBlaze to run the code we provide. We use the UART protocol to let users send input to MicroBlaze. Both of the designs use a comparator and counter for pulse count values. The counter module counts the rising edges of the clock-out signal and compares it to the pre-calculated pulse count value. If the current pulse count is equal to the pre-calculated value, then the clock-out signal will start to be generated at the next frequency level. The first design uses previously calculated frequency division ratios and pulse count values. Unlike the 2nd design Timer module has an address comparator and a control signal related to the address control. The second design has MicroBlaze and the Timer module. To be able to communicate between MicroBlaze and the Custom IP Timer module we used AXI Protocol. In order to achieve that we re-designed our Custom IP Timer module to become an AXI Peripheral. These modules are connected with AXI Interconnect. Several registers in the AXI Peripheral Timer module are used as our control signals. We control them within our C code which is responsible for generating needed inputs to the Timer. After observing the correct results via UART, we created the environment to test out a clock-out signal on the servo motor provided to us. Finally, we see our algorithm and design work together perfectly and correctly.

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