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Скачать или смотреть Spectrograph on stm32 demo

  • Roman Shishkin
  • 2016-01-12
  • 395
Spectrograph on stm32 demo
stm32stm32f4spectrographled matrixtlc5940
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Описание к видео Spectrograph on stm32 demo

A demonstration of a project on which I am working on.
Used 8 biquad 2-order IIR filters, witch load CPU to 100% (yeah with hardware FPU);

Of 100% CPU load, the sampling rate has dropped to 11.5 kHz, while it was planned 48 kHz, for this reason, column 8 doesn't work, since its frequency is greater than Nyquist frequency.

Plans on future:
a) use 32 instead of 8 column (this is why i making this, to make a 32*16 spectrograph);
b) optimize code (to get higher sampling rate. ATmega8 run faster than this shit);
c) maybe use an external ADC Instead of the internal (to reduce noise and aliasing);
d) control led matrix column by bd139 (to prevent pre-echo which comes from slowly closing of IRF4905, this is well illustrated on the 8 column 1:21) or use drivers for IRF4905 or use something another;
e) use incremental encoder (to adjust the values shown in the video);
f) because of b and d paragraphs change tlc5940 to tlc5925 (or analog ic) to get stable and faster indication;
g) maybe use constant q transform, but I don't understand how to optimize this algorithm.

...or maybe go to the FPGA instead of ARM, eventually calculating 32 series filter is not a good idea...
...or add another microcontroller to control the LED matrices...


Music Razihel - Falcon Punch    • Razihel - Falcon Punch  


16.11.2017 update:
Working with FPGA version. Control of the display developing from scratch, because the hardware has completely changed. In other words, everything is from scratch, because I haven't worked with FPGA before.
Intermediate result with stm32 (Sample rate = 48kHz (yey!!), Displaying freqs = 27.5...164.8Hz (A0-E3)): https://vk.com/video21435392_456239128

19.06.2018 update:
Intermediate result with FPGA: https://vk.com/video21435392_456239147
It works not as I want, but this is first result, which i get after a lots of attempts.
Sample rate = 48kHz (Actually it can be any sample rate, but the filters coefficients designed for 48kHz, since FPGA receives data from USB-I2S converter based on stm32 and it can't give more), Displaying freqs = 17.3...22350.5Hz (in logarithmic scale) with high Q.

16.01.2019 update:
3 years behind and a year after the moment I started working with FPGA version. And I didn't do anything worthwhile. Work and side projects take too much time. I just can’t sit down and do it, until inspiration comes, I can’t take up the project, because it seems boring to me, but I’m still interested in it. It also requires a little more money than I can spend on projects like this, because the plans for this project have changed, again. It's also a bit annoying that it is rather difficult to develop some things for FPGAs, perhaps because I try to optimize all the processing as much as possible. And it constantly didn't fit into the timings with all previous attempts and didn't get the desired result. Maybe I don't have enough knowledge.
But sometimes, and I hope as soon as possible, I will take it seriously and finish it.
Also, if I suddenly want, I will publish the source code from this video. In fact, at the software level there is nothing difficult: the tlc5940 driver, a simple bank of IIR filters with different frequencies, peak and rms detectors... and that's it! And I don’t remember well how hardware was made there. Try to deal with all this yourself, you will learn a lot of interesting and new information. But if you understand what's going on here, why are you reading this?

23.12.2024 update:
Yep, the project is really dead.

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