Layout design and post layout simulation in Spectre

Описание к видео Layout design and post layout simulation in Spectre

This tutorial video covers the basics of layout design and post-layout simulation using Cadence Spectre. The demonstration is done for a CMOS inverter in UMC 180nm technology. Calibre tool has been used for the DRC, LVS and parasitic extraction. The video will be helpful for the beginners of analog circuit design.

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