JK Flip Flop - Basic Introduction

This electronics video tutorial provides a basic introduction into the operation of the JK Flip Flop circuit which uses 2 two-input NAND Gates and 2 three-input NAND Gates. The JK Flip Flop circuit is an extension of the SR latch circuit with two additional NAND gates and a clock input. The invalid condition of the SR latch circuit is no longer an issue with the JK Flip Flop. When both J and K inputs are high with an active clock input, the output toggles back and forth between ON and OFF states.

Transistors - NPN & PNP:
   • Transistors - NPN & PNP - Basic Intro...  

Operational Amplifiers:
   • Operational Amplifiers - Inverting & ...  

LED Flasher Circuit:
   • LED Flasher Circuit  

RC Phase Shift Oscillator Circuit:
   • RC Phase Shift Oscillator Circuit Usi...  

555 Timer - Pulse Generator Circuit:
   • 555 Timer IC - Low Frequency Pulse Ge...  

LED Blinking Circuit Using 555 Timer:
   • LED Blinking Circuit Using 555 Timer  

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555 Timer Signal Generators:
   • 555 Timer Signal Generators - Square ...  

Diode Logic Gates:
   • Diode Logic Gates - OR, NOR, AND, & NAND  

Transistor Logic Gates:
   • Transistor Logic Gates - NAND, AND, O...  

Logic Gates and Truth Tables:
   • Logic Gates, Truth Tables, Boolean Al...  

3 Input Logic Gates:
   • 3 Input Logic Gates With Truth Tables...  

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SR Latch Circuit - Basic Introduction:
   • SR Latch Circuit - Basic Introduction  

SR Latch Circuit - NAND Gates:
   • SR Latch Circuit Using NAND Gates  

SR Flip Flop Circuit:
   • SR Flip Flop Circuit With NAND and NO...  

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