Dominant & Recessive logic in CAN protocol

In CAN, the dominant and recessive states refer to the two logical levels that can be transmitted over the communication bus. The CAN protocol uses a wired AND logic mechanism for determining the dominant or recessive state on the bus. The CAN bus lines are called CAN_H and CAN_L. These two lines are complementary and carry the signals that determine the logical levels. When a node wants to transmit a dominant (logical '0') bit, it will drive the CAN_H line to a higher voltage and the CAN_L line to a lower voltage. This creates a voltage difference between the two lines. On the other hand, when a node wants to transmit a recessive (logical '1') bit or when no node is transmitting, both CAN_H and CAN_L lines are pulled towards a middle voltage level. In this case, the voltage difference between the two lines is minimal.

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Timestamps:
00:00 - Agenda of this video
00:27 - 2 Logics of CAN protocol
01:26 - CAN logic levels with examples
03:03 - Advantages of logics in CAN protocol
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