A sensor to mayhaps thwart lasers from lasering chips

In this video, the chip grows the courage to say no to lasers, and that FPGAs don't deserve to feel pain. Nah just kidding the laser still pew pews the chip which cannot do anything to stop it, but this time the chip is at least aware that this is happening and can do something about it to prevent bad things from happening as a result.

This video is based on a paper I co-authored and submitted to ICCAD 2024. Here is the paper: https://arxiv.org/pdf/2405.03632
Note that this is not the actual conference proceedings, since those are not out yet. The GitHub repository linked in the paper is not public yet because we're still working on that before the proceedings are out. I'll update this and the link once they are out.

NOTE 0: in the world of chip-level hardware design, there are two paths to go down: Application Specific Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs). An ASIC as essentially a ground-up custom built chip. Developing an ASIC is extremely expensive unless you are manufacturing them in the millions, because it requires you to actually fabricate the chip yourself using some of the most complex and expensive machines in the world or pay someone else to. The FPGA, on the other hand, is a big blob of digital logic elements that you can program yourself to do whatever you want. an ASIC is always faster, but when it doesn't make financial sense to make one, an FPGA is a pretty good alternative. Likewise, FPGAs are often used in industry and academia as an ASIC development platform, as you can make minor changes to an FPGA design without fabricating a whole new chip. The two images here show a schematic of an implemented FPGA design, and the physical layout of those components on an FPGA.

NOTE 1: The bulk of FPGA logic is split into "lookup tables" and "registers." A lookup table (LUT) is a logic element that can implement any combinational logic function. By that I mean any function where the binary output is based on the present state of the inputs, and nothing else (e.g. AND, OR, NAND, NOR, etc). A register is a logic element that stores a previous state of an input, which can then be fed into various things that can depend on both current inputs and past inputs. In this example, a LUT configured as a NOT gate feeds the output of a register back into its input. this causes the output of the register to flip between 0 and 1 every time a "store" is triggered, which in this case happens at a frequency of 20MHz, or 20 million times per second. Thus, the output goes between 0 and 1 at a frequency of 10MHz, or 10 million times per second.

NOTE 2: LUTs, and any other combinational logic for that matter, do not update their output immediately - it takes some time due to various effects in (non-ideal) wires and transistor gates. The simplest way to model this is that there is a delay between the when an input updates and when the output updates, known as "propagation delay." The reality is a bit more complicated, but often times it doesn't matter, we just want to know how long it takes for an update in the output to be stable and usable.

This is a cool video that I can't not share:
   • Dropping Go Pro Down A Deep Mystery Pipe  

MUSIC USED:
Super Mario Galaxy 2 OST - Flip Swap GalaxySuper Mario Galaxy 2 OST - Chompworks Galaxy
OMORI OST - 103 Gator Gambol
Super Mario World OST - Cast List