Скачать или смотреть Design a 2-bit register R with two function select inputs F1 and F0.

Design a 2-bit register R with two function select inputs F1 and F0. It has a 2-bit parallel input DIN and 2-bit parallel output DOUT. The function table of the register is given below.


a. Assuming there are no constraints on hardware cost.
b. Assuming that all microops need to be completed in two clock cycles or less. The
hardware constraint is that no more two buses should be used.
c. Assume that all microops need to be completed using only a single bus. Minimize the
number of clock cycles used given the hardware constraints.
For each case describe the microop executed in each clock cycle and also the bus used for implementing that microop.
F1F0
Operation (at positive edge of clock)
00
no change
01
R~R (complement)
10
RDIN (parallel load)
11
R0 (clear register)
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