Скачать или смотреть Digital Clock Verilog Project.wmv

This is a FPGA based Digital Clock Project.It has the capability to display time,set time and reset it. It basically uses 2 mod 60 counters and a mod 24 counter. Each time the seconds counter reaches 60,it is reset and the minute counter is incremented.Every time the minute counter reaches 60,it is reset and the hour counter is incremented.Every time the hour counter reaches 24,it is reset.A clock pulse of 100khz if given to the FPGA which is converted to 1hz using clock division technique.This 1hz clock pulse is used to drive the seconds counter and this is how this project works.
The Verilog Code for it can be found here.
http://digclkproject.blogspot.in/