Скачать или смотреть {System}Verilog for ASIC/FPGA Design & Simulation - Session 1

The recording of the first session of the "{System}Verilog for ASIC/FPGA Design & Simulation" short course. Please visit bit.ly/entc-systemverilog for more details.

00:00 - Welcome
01:32 - Introduction to the department & why we are doing these courses by Dr Ranga Rodrigo
06:56 - Electronic chip demystified: Arduino to Apple M2 by Mr Kaveesha Yalegama
14:13 - Keynote speech by Dr Theodore Omtzigt
37:51 - Making a chip; A 50-year journey by Mr Abarajithan Gnaneswaran & Mr Kithmin Wickremasinghe
59:58 - Keynote speech by Mr Farazy Fahmy (Synopsys)
1:23:34 - FPGA (The Flexible Chip) & Busting Myths about SystemVerilog by Mr Abarajithan Gnaneswaran
1:57:21 - Course intro & logistics by Dr Subodha Charles, Mr Abarajithan Gnaneswaran, Mr Pasindu Sandima (Parakum Technologies), and Mr Sanjula Thiranjaya (Parakum Technologies)
2:35:38 - Q & A