2017 EuroLLVM Developers’ Meeting: R. Lozano “Register Allocation and Instruction Scheduling in...”

http://www.LLVM.org/devmtg/2017-03/
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Register Allocation and Instruction Scheduling in Unison - Roberto Castañeda Lozano, Swedish Institute of Computer Science

Slides: http://llvm.org/devmtg/2017-03//asset...
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This talk presents Unison - a simple, flexible and potentially optimal tool that solves register allocation and instruction scheduling simultaneously. Unison is integrated with LLVM's code generator and can be used as a complement to the existing heuristic algorithms.

The ability to deliver optimal code makes Unison a powerful tool for LLVM users and developers: LLVM users can trade compilation time for code quality beyond the usual -O{0,1,2,3,..} optimization levels; LLVM developers can identify improvement opportunities in the existing heuristic algorithms. The talk discusses some of the improvement opportunities identified so far with the help of Unison.
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