ACACES 2024: Hardware/software co-optimization for machine learning at the edge, Lecture 2

Second lecture from the course by Giovanni Ansaloni (‪@epfl‬) at ACACES 2024. In this lecture, Giovanni begins by looking at the wide landscape of hardware options and the importance of hardware-software co-design. He then goes on to explore practical solutions for edge processor architectures, before moving on to ultra-low-power multi-processors, hardware acceleration, and CNN ensembles and codebooks.

00:00 Intro
07:00 Edge processor architecture
13:45 Ultra-low-power multi-processors
36:30 Hardware acceleration (Coarse Grained Reconfigurable Arrays)
52:20 CNN ensembles and codebooks

ACACES 2024 was a joint summer school organized by HiPEAC (https://www.hipeac.net) and DISCOVER-US (https://discover-us.eu).

Further information:
ACACES 2024: https://www.hipeac.net/acaces/2024/#/
Giovanni Ansaloni's EPFL webpage: https://people.epfl.ch/giovanni.ansal...