[COA 55] 4 Bit - Adder Subtractor

4 - Binary Adder Subtractor

Introduction: Computer Organization and Architecture:    • [COA 1] Introduction: Computer Organi...  
Logic Gates: AND, OR, NOT, NAND, NOR, EXOR, EXNOR:    • [COA 2] Logic Gates: AND, OR, NOT, NA...  
Boolean Algebra, Boolean function, Truth table, Logic diagram, Boolean expression:    • [COA 3] Boolean Algebra, Boolean func...  
Canonical form and standard form. Sum of minterms and product of maxterms:    • [COA 4] Canonical form and standard f...  
Map Method (P1): K-Map simplification:    • [COA 5] Map Method (Part 1): K-Map si...  
Map Method (P2): Map simplification using don't care condition:    • [COA 6] Map Method (Part 2): Map simp...  
Map Method (P3): Product of sum using map:    • [COA 7] Map Method (Part 3): Product ...  
Universal Gates (NAND and NOR Gates):    • [COA 8] Universal Gates (NAND and NOR...  
NAND and NOR Realization:    • [COA 9] NAND and NOR Realization  
Number System: Decimal, Hexadecimal, Octal and Binary:    • [COA 10] Number System: Decimal, Hexa...  
Conversion I(Decimal to Binary & Binary to Decimal):    • [COA 11] Conversion I (Decimal to Bin...  
Conversion II(Decimal to hexadecimal & hexadecimal to decimal):    • [COA 12] Conversion II (Decimal to he...  
Conversion III(Decimal to octal & Octal to decimal):    • [COA 13] Conversion III (Decimal to o...  
ConversionsIV: Octal - Hexadecimal, Hexadecimal - Octal, Octal - Binary, Binary - Octal:    • [COA 14] Conversions IV: Octal - Hexa...  
Complements r's and (r-1)'s complements, 10's, 9's, 2's, 1's, 8's, 7's complements:    • [COA 15] Complements r's and (r-1)'s ...  
Binary Codes: BCD, 2 4 2 1 code, 8-4 -2 -1 code, Excess 3 code, Biquinary code, Grey code:    • [COA 16] Binary Codes: BCD, 2 4 2 1 c...  
Binary arithmetic: Binary addition, subtraction, multiplication, division:    • [COA 17] Binary arithmetic: Binary ad...  
Octal number arithmetic: Octal addition, Octal subtraction, Octal multiplication, Octal division:    • [COA 18] Octal number arithmetic: Oct...  
Fixed and Floating point representation, IEEE 754 standard:    • [COA 19] Fixed and Floating point rep...  
Combinational circuit: Half adder, Full Adder, Half Subtractor,Full Subtractor:    • [COA 20] Combinational circuit: Half ...  
Combinational circuit: BCD Adder:    • [COA 21] Combinational circuit: BCD A...  
Code conversion: BCD to Excess 3 code:    • [COA 22] Code conversion: BCD to Exce...  
Magnitude Comparator:    • [COA 23] Magnitude Comparator  
Binary Serial and Parallel Adder:    • [COA 24] Binary Serial and Parallel A...  
Carry Lookahead Generator (Adder):    • [COA 25] Carry Lookahead Generator (A...  
Parity bit generator & checker:    • [COA 26] Parity bit generator and che...  
Decoder Part I: Basic decoder operation, block diagram, circuit diagram:    • [COA 27] Decoder Part I: Basic decode...  
Full adder implementation using Decoder:    • [COA 28] Full adder implementation us...  
Construct 4:16 decoder using two 3:8 decoders:    • [COA 29] Construct 4:16 decoder using...  
Encoder:    • [COA 30] Encoder  
Multiplexer (PI) using simple explanation:    • [COA 31] Multiplexer (Part I) using s...  
De-Multiplexer using simple example:    • [COA 32] De-Multiplexer using simple ...  
Quadruple two line to one line multiplexer:    • [COA 33] Quadruple two line to one li...  
Implementation of Boolean function using multiplexer:    • [COA 34] Implementation of Boolean fu...  
ROM Design Basics:    • [COA 35] ROM Design Basics  
PLA: Programmable logic array:    • [COA 36] PLA : Programmable logic array  
Sequential Circuit (P 1): Basics:    • [COA 37] Sequential Circuit (Part 1):...  
Flip Flops(P1):    • [COA 38] Flip Flops (Part 1)  
Flip Flops(P2): RS FF, D-FF, JK-FF, T-FF:    • [COA 39] Flip Flop (Part 2): RS FF, D...  
Sequential circuit design using JK Flip flops:    • [COA 40] Sequential circuit design us...  
State reduction: Sequential circuit:    • [COA 41] State reduction: Sequential ...  
Design a counter using T Flip Flops:    • [COA 42] Design a counter using T Fli...  
Ripple Counter (Binary and BCD), Synchronous Counter, Up Down Counter:    • [COA 43] Ripple Counter (Binary and B...  
Registers (Basics): Register with D FF, Register with RS FF, Register with reloading:    • [COA 44] Registers (Basics): Register...  
Basic Shift Register and Bi-directional Shift Register with Parallel Load:    • [COA 45] Basic Shift Register and Bi-...  
Counter with parallel load:    • [COA 46] Counter with parallel load  
Ring Counter:    • [COA 47] Ring Counter  
Johnson Counter using simple example:    • [COA 48] Johnson Counter using simple...  
NAND Gate Decoder:    • [COA 50] NAND Gate Decoder  
Register and register transfer:    • [COA 51] Register and register transfer  
Common bus system using multiplexer:    • [COA 52] Common bus system using mult...  
Three state bus buffer:    • [COA 53] Three state bus buffer  
4-Bit Binary Adder and Memory Transfer:    • [COA 54] 4-Bit Binary Adder and Memor...  
4 Bit-Adder Subtractor:    • [COA 55] 4 Bit - Adder Subtractor  
Incrementer (using Half Adder) & Decrementer circuit (using Full adder):    • [COA 56] Incrementer (using Half Adde...  
Complete Arithmetic Circuit using Full adder & Multiplexer:    • [COA 57] Complete Arithmetic Circuit ...  
Logic Micro operation:    • [COA 58] Logic Micro operation  
BIT Manipulation: Selective set, selective complement, selective clear, mask, insert, clear:    • [COA 59] BIT Manipulation: Selective ...  
Shift Micro operation: Logical, circular, & arithmetic shift:    • [COA 60] Shift Micro operation: Logic...  
CPU & General register organisation:    • [COA 61] CPU Basics and General regis...  
Instruction format:    • [COA 62] Instruction format  
Addressing Modes: Implied, Immediate, Register, Register indirect:    • [COA 63] Addressing Modes: Implied, I...  
Program Interrupt: External, Internal, Software:    • [COA 64] Program Interrupt: External ...  
Program Status Register:    • [COA 65] Program Status Register