Скачать или смотреть Intel To Take On AMD's 3D V-Cache (X3D) with bLLC

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Source: https://www.tweaktown.com/news/106923...

Intel's upcoming Nova Lake-S desktop CPUs, set for release in 2026, will introduce significant architectural advancements. The flagship models will feature up to 52 cores and 52 threads, incorporating Intel's new "bLLC" (Big Last Level Cache) technology. This bLLC is designed as an on-die L3 cache positioned within the ringbus, aiming to compete directly with AMD's 3D V-Cache in performance.

The Nova Lake-S architecture features a modular design with five distinct tiles. These include two bLLC dies for compute tiles (with configurations such as 8 Performance Cores + 16 Efficiency Cores), a Hub Die for North Bridge IP, media, display, NPU, and memory control, a Platform Controller Die (PCD) for South Bridge IP and PCIe, and an iGPU Die with 32 Celestial Execution Units. The high-end Nova Lake-S processors, including the 52-core flagship, will be manufactured on TSMC's N2P process node, while entry-level variants will use Intel's in-house 18A process.

Performance projections indicate substantial improvements over the current Arrow Lake generation. Non-bLLC Nova Lake-S models are expected to deliver a 16% single-threaded and 12% multi-threaded performance increase. The bLLC variants show even greater gains, with a projected 20% single-threaded and 23% multi-threaded uplift. For the 52-core flagship, simulations suggest an impressive 80% multi-threaded performance boost. In gaming, bLLC Nova Lake-S could outperform Arrow Lake by 30-45%, with standard Nova Lake offering 10-15% better performance.

Intel is also reportedly developing an "APO+" program. This program aims for an additional 15-25% gaming uplift by leveraging specialized Intel optimizations and potentially overwriting game executables to use newer instructions. This raises concerns about DRM compatibility, but Intel appears determined to narrow the gaming performance gap with competitors like AMD's Zen 6.

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