Скачать или смотреть KCPSM3 (PicoBlaze) Test System with 90 nm CMOS ASIC Processor Array (part 1)

This video shows a PC application communicating with a dedicated CMOS asynchronous processor array for image processing using the KCPSM3 (PicoBlaze) Test System. The test chip was fabricated in a 90 nm CMOS technology and consists of 96 x 64 simple dynamic logic processors performing two binary operations: AND and OR, and capable of storing 1 bit of information. Each processor in the array communicates with only four nearest neighbours and performs the same operations depending on the incomig messages (data-driven computation scheme).Despite its structural simplicity (only 24 MOS transistors per pixel-processor), the designed processor array extracts trustworthy binary image skeletons with speed up to 2.78 Mfps and total power consumption less than 1.7 mW.

For more information, please visit our web page (The University of Manchester, Microelectronics Design Lab): http://personalpages.manchester.ac.uk...

More info about the processor array: http://personalpages.manchester.ac.uk...