Turing Complete - How to Build a MIPS R2K Machine [Part 1]

In this series we discuss how to build a MIPS architecture inside the game Turing Complete. This is the architecture typically studied in a university computer architecture course. It makes a good case study for some hardware concepts beyond what Turing Complete currently studies, such as pipelining.

In this part we take a very high level overview of MIPS, the basic instructions, the memory layout, and the logical registers. Then we build a 32-bit ALU from first principles, and finally talk about building a data memory with a variable width write port.

In the next part, we will talk about the MIPS register file in more detail, and then take a closer look at the instructions so that we can build an instruction decoder. Then we'll put all the pieces together into the full architecture and use it to solve the programming puzzles in the game. In the following part, we will discuss pipelining.

As always, leave questions or comments below, or ping me in #teaching in the Turing Complete Discord server. I'll add minor corrections via Closed Captions as issues are found.

00:00 Introduction
02:00 The Green Sheet (Page 1)
15:00 The Green Sheet (Page 2)
22:20 Overview ALU from First Principles
23:00 Addition and Subtraction in One Circuit
24:10 Multiplexers as Result Selectors
25:10 Building a 2:1 1-bit Multiplexer
26:50 4:1 1-bit Multiplexer Tree From 2:1 Muxes
30:00 1-bit Logic Unit
34:25 1-bit ALU
42:15 Combining 1-bit ALU Slices
51:55 ALU Flags
59:25 Simple 32-bit ALU
1:04:53 Data Memory Overview
1:08:00 Custom RAM Components
1:12:50 Data Memory Component Circuit
1:17:20 The Memory Segment Magic Numbers
1:24:00 Byte-Writeable Memory Circuitry
1:28:15 Testing Components in the Lab
1:33:15 Conclusion