UCIe™ Packaging Technologies Webinar

UCIe™ (Universal Chiplet Interconnect Express™) is an open specification that defines the interconnect between chiplets within a package, enabling an open chiplet ecosystem and ubiquitous interconnect at the package level.

UCIe technology offers flexibility for integration across multiple packaging technologies. The webinar will cover standard laminate as well as advanced options such as silicon interposers, silicon bridges, and fan-out/RDL from multiple vendors. The presentation will also explore the 2D and 2.5D physical bump map arrangements along with interoperability rules. Attendees will have a chance to participate in a live Q&A discussion immediately after the webinar to address questions from the presentation. 

Presenters: 
- Gerald Pasdast, UCIe Consortium Form Factor and Compliance Workgroup Co-Chair and Senior Principal Engineer at Intel 
- Stefan Rusu, Senior Director at TSMC

Learn more about the UCIe Consortium: https://www.uciexpress.org/
Presentation slides: https://www.uciexpress.org/webinars

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