CCU

Xilinx was founded 40 years ago in 1984, with its first FPGA debuting shortly thereafter in 1985, the XC2064². Three years later in 1988 the XC3000 series were released, including the XC3090. The XC3090 had a total of 9,000 logic gates, whereas the XC2064 only had 1,200. Modern FPGAs often have logic gates well into the millions.
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The 9,000 logic gates available on the XC3090 are grouped into repeating structures called Configurable Logic Blocks (CLB) which the XC3090 has 320¹. In addition to containing programmable combinatorial logic, each CLB contains storage registers. Each CLB can be configured to perform any Boolean function of the inputs into the CLB, and also from the output via an internal feedback path. Multiple CLBs can be connected to each other to form more complex logic, and with 144 I/O pins there really was a lot that these devices could accomplish.
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Originally the XC3000 was available in two speed grades, 50 or 70. The speed grade is denoted by the number after the dash in the part number. This number identified the maximum speed at which the logic gates could toggle in MHz. The XC3090-70 ran at 70MHz, while more modern implementations of the XC3090 could run at up to 125MHz.³
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I really like the full-die photo of this part because you can easily see all 320 CLBs. Each CLB would contain around 28 logic gates, with each of those logic gates being made up of multiple individual transistors. Picture 8 is of a single CLB.
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Sources:
¹ The Programmable Gate Array Data Book - Xilinx (PDF, bitsavers)
² Field-programmable gate array - Wikipedia
³ XC3000 Logic Cell Array Family Datasheet (PDF, Digikey)