Скачать или смотреть Sample Design of SoC using both "PS+PL" | Verilog | FPGA

Welcome to FPGA Works! In this video, we demonstrate a Sample System-on-Chip (SoC) Design implemented on the EDGE Zynq FPGA board, showcasing the integration of Processing System (PS) and Programmable Logic (PL). This project highlights how hardware and software can work together seamlessly to implement complex embedded systems.

Using Xilinx Vivado Design Suite and Xilinx SDK, we created a design where the PS runs application code while communicating with custom hardware blocks in the PL via AXI interfaces. This design exemplifies the power of hardware/software co-design in modern embedded development.

This project is an excellent starting point for anyone exploring Zynq-based SoC design, offering insight into embedded systems, IP integration, and efficient co-processing.

📌 If you find this video helpful, don’t forget to like, share, and subscribe for more exciting FPGA-based projects!

📬 Mail: [email protected]
💻 Code:
🎓 Copyright Disclaimer:
This video is for educational and informational purposes only. All content, including footage, images, and music, belongs to their respective owners, and I do not claim ownership unless explicitly stated. Under Section 107 of the Copyright Act 1976, allowance is made for "fair use" for purposes such as criticism, comment, news reporting, teaching, scholarship, and research. Any unauthorized reproduction, redistribution, or re-uploading of this video is strictly prohibited.

Journey by Roa | [https://roa-music.com](https://roa-music.com)
Music promoted by [https://www.chosic.com/free-music/all/](https://www.chosic.com/free-music/all/)
Creative Commons CC BY 3.0
[https://creativecommons.org/licenses/...](https://creativecommons.org/licenses/...)