Physical Design - Part 1: Synthesis Process | Synopsys Design Compiler Tool | Demo (Webinar 2)

Описание к видео Physical Design - Part 1: Synthesis Process | Synopsys Design Compiler Tool | Demo (Webinar 2)

1. This demo includes the information of tool usage and Physical Design Flow with respect to the Synthesis process.

2. The tool described in this demo session is "Design Compiler(DC)".

3. A brief introduction of Synthesis flow in the Physical Design, Tcl scripting commands used for executing the synthesis process in the unix environment and how to invoke (open) the DC tool are explained in a detailed manner.

4. The example project considered for the Synthesis process is the RTL file of "Counter" module.

5. By the end of this demo session you will be familiar with how to use the tool for synthesis, What is Synthesis process in the physical design flow and little essence of Tcl scripting.

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