VLSI Physical Design: Floorplan

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First step in the Physical Design flow
• Floor planning is the process of determining the Macro placement, power grid generation and I/O placement.
• Floor planning involves
• Defining the size of the chip or block
• Pre-placing hard macros, • IO pads and other desired objects
• Defining a power grid for the design.
• Placing Blocks/Macros in the chip/core area, thereby determining the
routing areas between them.
• All stages like placement, routing and timing closure are dependents on
how good is your floorplan.
• A bad floor-plan will lead to waste-age of die area and routing congestion.
• types of floorplan techniques
• blockages
• halos/keepout margin
• floorplan guidelines
• floorplan objectives, inputs and outputs.