VLSI Physical Design: Powerplan

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Power plan
Power planning is done to provide uniform supply voltages to all cells in the design. The primary objective of power planning is to ensure that all on chip components (blocks, memory, I/O cells etc...) have adequate power and ground connections.

-Power Management Techniques
1. Core Power Management
2. I/O Power Management

-Inputs of Power plan
-UPF Contents
-Special cells: power switch, Isolation Cells, Retention Registers, Level Shifter cells.
-Power Reduction Techniques: Power gating, Clock Gating, Voltage and Frequency Scaling, Substrate Biasing, Multiple Threshold Voltages, Multiple Supply Voltages and memory partitioning.
Types of Power Dissipation: static Power Dissipation and Dynamic Power Dissipation.
-IR Drop, Electromigration.
-Power plan checklists.